Source Code

Simulation Results

#	pc	op	rd	qd (hex)	qd (dec)	addr
1	00	ori	2	000F	15
2	01	sw	2	000F	15	0006
3	02	lw	3	000F	15	0006
4	03	addi	4	0012	18
5	04	addi	5	0016	22
6	05	halt

Pipeline Results

#	IF	ID	EX	MEM	WB	ok
1	0000 ori
2	0001 sw	0000 2 0 0xf
3	0002 lw	0001 0 0 0x6	0000 0xf
	qb forwarded: 0xf (rb: 2)
4	0003 addi	0002 3 0 0x6	0001 0x6	0000
5	0003 addi		0002 0x6	0001 0xf	0000 0xf	0000 0xf
	mem[0x6] = 0xf
6	0004 addi	0003 4 3 0x3		0002 0xf	0001 0xf	0001 0xf
	qd = 0xf = mem[0x6]
	qa forwarded: 0xf (ra: 3)
	qa forwarded: 0xf (ra: 3)
7	0005 halt	0004 5 2 0x7	0003 0x12		0002 0xf	0002 0xf
8		0005	0004 0x16	0003
9			0005	0004	0003 0x12	0003 0x12
10				0005	0004 0x16	0004 0x16

Registers

format	r0	r1	r2	r3	r4	r5	r6	r7
hex	00000000	00000001	0000000F	0000000F	00000012	00000016	00000006	00000007
decimal	0	1	15	15	18	22	6	7
format	r8	r9	r10	r11	r12	r13	r14	r15
hex	00000008	00000009	0000000A	0000000B	0000000C	0000000D	0000000E	0000000F
decimal	8	9	10	11	12	13	14	15
format	r16	r17	r18	r19	r20	r21	r22	r23
hex	00000010	00000011	00000012	00000013	00000014	00000015	00000016	00000017
decimal	16	17	18	19	20	21	22	23
format	r24	r25	r26	r27	r28	r29	r30	r31
hex	00000018	00000019	0000001A	0000001B	0000001C	0000001D	0000001E	0000001F
decimal	24	25	26	27	28	29	30	31

Memory

addr	0	1	2	3	4	5	6	7	8	9	A	B	C	D	E	F
00000000	00000000	00000000	00000000	00000000	00000000	00000000	0000000F	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000
00000010	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000