MIPS processors use a load/store architecture; all operations are performed on operands held in processor registers and main memory is accessed only through load and store instructions.
There are several different types of load and store instructions, each designed for a different purpose:
The final two types contain features whose ingenuity might go unheeded (and unused) because they are harder to understand and are not well explained.
The following data sizes are transferred by CPU load and store instructions:
Signed and unsigned integers of different sizes are supported by loads that either sign-extend or zero-extend the data loaded into the register.
Instruction | Description | Function |
---|---|---|
LB | Load Byte | Rt = (byte)Mem[Rs+offset] |
LBU | Unsigned Load Byte | Rt = (ubyte))Mem[Rs+offset] |
LH | Load Halfword | Rt = (half)Mem[Rs+offset] |
LHU | Unsigned Load Halfword | Rt = (uhalf)Mem[Rs+offset] |
LW | Load Word | Rt = Mem[Rs+offset] |
LWPC | Load Word, PC relative | Rt = Mem[PC+offset] |
SB | Store Byte | (byte)Mem[Rs+offset] = Rt |
SH | Store Half | (half)Mem[Rs+offset] = Rt |
SW | Store Word | Mem[Rs+offset] = Rt |
Unaligned words and doublewords can be loaded or stored in just two instructions by using a pair of special instructions. For loads a LWL instruction is paired with a LWR instruction. The load instructions read the left-side or right-side bytes (left or right side of register) from an aligned word and merge them into the correct bytes of the destination register.
Instruction | Description | Function |
---|---|---|
LWL | Load Word Left | See Architecture Reference Manual |
LWR | Load Word Right | See Architecture Reference Manual |
SWL | Store Word Left | See Architecture Reference Manual |
SWR | Store Word Right | See Architecture Reference Manual |
The paired instructions, Load Linked and Store Conditional, can be used to perform an atomic read-modify-write of word or doubleword cached memory locations. These instructions are used in carefully coded sequences to provide one of several synchronization primitives, including test-and-set, bit-level locks, semaphores, and sequencers and event counts.
Instruction | Description | Function | |||
---|---|---|---|---|---|
LL | Load Linked Word |
Rt = Mem[Rs+offset] LL = 1 LLAdr = Rs + offset |
PIC32MX Family Reference Manual, Microchip Techology, 2008. Section 2.15
The example project shown here attempts to use as many different types of load/store instructions as possible. A count of load/store instructions of various kinds (all I-Format) is show below:
op | I code | count |
---|---|---|
0x20 | lb | 1 |
0x21 | lh | 2 |
0x22 | -- | 0 |
0x23 | lw | 77 |
0x24 | lbu | 4 |
0x25 | lhu | 1 |
0x26 | -- | 0 |
0x27 | -- | 0 |
0x28 | sb | 3 |
0x29 | sh | 2 |
0x2a | -- | 0 |
0x2b | sw | 49 |
The interested reader may search the disassembly listing for these occurances. The opcode count was limited to the range 0x9d00.0000 through 0x9d00.0584.
Below is a brief excerpt showing several loads and stores:
34: if (peppers[i]<0) ns++; 9D000084 3C02A000 lui v0,0xa000 v0 = address of peppers 9D000088 8FC30010 lw v1,16(s8) v1 = i (from stack) 9D00008C 24420000 addiu v0,v0,0 9D000090 00621021 addu v0,v1,v0 v0 = peppers + i 9D000094 80420000 lb v0,0(v0) v0 = peppers[i] (signed char) 9D000098 04410004 bgez v0,0x9d0000ac 9D00009C 00000000 nop 9D0000A0 8FC20018 lw v0,24(s8) v0 = ns (from stack) 9D0000A4 24420001 addiu v0,v0,1 v0 = v0 + 1 9D0000A8 AFC20018 sw v0,24(s8) ns = v0 (to stack)
Download: mem3.zip
001: // comment the following line to enable Microsoft C 002: #define PIC32 003: #if defined(PIC32) 004: #include <p32xxxx.h> 005: // comment the following line to enable debug output 006: //#define UART2_IO 007: #include "db_utils.h" 008: #else // Microsoft C 009: #include <stdio.h> 010: #define DBPRINTF printf 011: #define DBPUTS(s) 012: #endif 013: 014: char *phrase = "The quick brown fox jumps over the lazy dog"; 015: 016: signed char peppers[] = {'p','e','p','p','e','r','s',-5,0}; 017: 018: unsigned short bins[96]; 019: 020: double v[4] = {1.0, 2.0, 3.0, 4.0}; 021: 022: void do_hist(char *str, int len, short bins[96]); 023: void show_bins(short bins[96]); 024: double cum_sum(double v[], int len); 025: 026: int main() 027: { 028: int i, nv, ns; 029: printf("peppers = %p\n",peppers); 030: nv = strlen(peppers); 031: printf("string length %d\n",nv); 032: ns = 0; 033: for (i=0; i<nv; i++) { 034: if (peppers[i]<0) ns++; 035: } 036: printf("negative bytes: %d\n",ns); 037: printf("phrase = %p\n",phrase); 038: nv = strlen(phrase); 039: printf("bins = %p\n",bins); 040: do_hist(phrase,nv,bins); 041: show_bins(bins); 042: printf("v = %p\n",v); 043: nv = sizeof(v) / sizeof(v[0]); 044: printf("v length %d\n",nv); 045: cum_sum(v,nv); 046: for (i=0; i<nv; i++) { 047: printf("%g\n",v[i]); 048: } 049: DBPUTS("Program terminated. Click HALT and then RESET to stop the microcontroller. \n"); 050: return 0; 051: } 052: 053: int strlen(char *str) 054: { 055: int count = 0; 056: while (*str++) count++; 057: return count; 058: } 059: 060: void show_bins(short bins[96]) 061: { 062: int i, n; 063: unsigned char ch; 064: unsigned char str[60]; 065: unsigned char *cp; 066: cp = str; 067: for (i=1; i<60; i++) { 068: *cp = 0; 069: ch = i+32; 070: n = bins[i]; 071: if (n==0) continue; 072: *cp++ = ch; 073: printf("%c %4d\n",ch,bins[i]); 074: } 075: printf("characters present:\n%s\n",str); 076: n = strlen(str); 077: printf("number of characters: %d\n",n); 078: } 079: 080: void do_hist(char *str, int len, short bins[96]) 081: { 082: int i, n; 083: for (i=0; i<96; i++) bins[i] = 0; 084: for (i=0; i<len; i++) { 085: n = str[i]&0x7F; 086: if (n==0) break; 087: if (n>96) n -= 32; 088: if (n>32) n -= 32; 089: else n = 0; 090: bins[n]++; 091: } 092: } 093: 094: double cum_sum(double v[], int len) 095: { 096: int i; 097: double sum = v[0]; 098: for (i=1; i<len; i++) { 099: sum += v[i]; 100: v[i] = sum; 101: } 102: return sum; 103: }
The addresses of variables on the MPLAB ICE are
name | address | remarks |
---|---|---|
peppers | 0xa000.0000 | data memory |
phrase | 0x9d07.4268 | progam memory (read-only) |
bins | 0xa000.023c | data memory |
v | 0xa000.0010 | data memory |
This code compiles and runs from MPLAB ICE and also compiles and runs using Microsoft C. The results for both are shown below. The only difference is the addresses of various variables.
MIPS32 Starter Kit | Microsoft C/Windows Console |
---|---|
peppers = 0xa0000000 string length 8 negative bytes: 1 phrase = 0x9d074268 bins = 0xa000023c A 1 B 1 C 1 D 1 E 3 F 1 G 1 H 2 I 1 J 1 K 1 L 1 M 1 N 1 O 4 P 1 Q 1 R 2 S 1 T 2 U 2 V 1 W 1 X 1 Y 1 Z 1 characters present: ABCDEFGHIJKLMNOPQRSTUVWXYZ number of characters: 26 v = 0xa0000010 v length 4 1 3 6 10 |
1: // comment the following line to enable Microsoft C 2: #define PIC32 3: #if defined(PIC32) 4: #include <p32xxxx.h> 5: // comment the following line to enable debug output 6: //#define UART2_IO 7: #include "db_utils.h" 8: #else // Microsoft C 9: #include <stdio.h> 10: #define DBPRINTF printf 11: #define DBPUTS(s) 12: #endif 13: 14: char *phrase = "The quick brown fox jumps over the lazy dog"; 15: 16: signed char peppers[] = {'p','e','p','p','e','r','s',-5,0}; 17: 18: unsigned short bins[96]; 19: 20: double v[4] = {1.0, 2.0, 3.0, 4.0}; 21: 22: void do_hist(char *str, int len, short bins[96]); 23: void show_bins(short bins[96]); 24: double cum_sum(double v[], int len); 25: 26: int main() 27: { 9D000018 27BDFFD8 addiu sp,sp,-40 9D00001C AFBF0024 sw ra,36(sp) 9D000020 AFBE0020 sw s8,32(sp) 9D000024 03A0F021 addu s8,sp,zero 28: int i, nv, ns; 29: printf("peppers = %p\n",peppers); 9D000028 3C029D07 lui v0,0x9d07 9D00002C 24444294 addiu a0,v0,17044 9D000030 3C02A000 lui v0,0xa000 9D000034 24450000 addiu a1,v0,0 9D000038 0F400283 jal 0x9d000a0c 9D00003C 00000000 nop 30: nv = strlen(peppers); 9D000040 3C02A000 lui v0,0xa000 9D000044 24440000 addiu a0,v0,0 9D000048 0F400082 jal 0x9d000208 9D00004C 00000000 nop 9D000050 AFC20014 sw v0,20(s8) 31: printf("string length %d\n",nv); 9D000054 3C029D07 lui v0,0x9d07 9D000058 244442A4 addiu a0,v0,17060 9D00005C 8FC50014 lw a1,20(s8) 9D000060 0F400283 jal 0x9d000a0c 9D000064 00000000 nop 32: ns = 0; 9D000068 AFC00018 sw zero,24(s8) 33: for (i=0; i<nv; i++) { 9D00006C AFC00010 sw zero,16(s8) 9D000070 8FC20010 lw v0,16(s8) 9D000074 8FC30014 lw v1,20(s8) 9D000078 0043102A slt v0,v0,v1 9D00007C 10400010 beq v0,zero,0x9d0000c0 9D000080 00000000 nop 9D0000AC 8FC20010 lw v0,16(s8) 9D0000B0 24420001 addiu v0,v0,1 9D0000B4 AFC20010 sw v0,16(s8) 9D0000B8 1000FFED beq zero,zero,0x9d000070 9D0000BC 00000000 nop 34: if (peppers[i]<0) ns++; 9D000084 3C02A000 lui v0,0xa000 9D000088 8FC30010 lw v1,16(s8) 9D00008C 24420000 addiu v0,v0,0 9D000090 00621021 addu v0,v1,v0 9D000094 80420000 lb v0,0(v0) 9D000098 04410004 bgez v0,0x9d0000ac 9D00009C 00000000 nop 9D0000A0 8FC20018 lw v0,24(s8) 9D0000A4 24420001 addiu v0,v0,1 9D0000A8 AFC20018 sw v0,24(s8) 35: } 36: printf("negative bytes: %d\n",ns); 9D0000C0 3C029D07 lui v0,0x9d07 9D0000C4 244442B8 addiu a0,v0,17080 9D0000C8 8FC50018 lw a1,24(s8) 9D0000CC 0F400283 jal 0x9d000a0c 9D0000D0 00000000 nop 37: printf("phrase = %p\n",phrase); 9D0000D4 3C029D07 lui v0,0x9d07 9D0000D8 244442CC addiu a0,v0,17100 9D0000DC 8F858004 lw a1,-32764(gp) 9D0000E0 0F400283 jal 0x9d000a0c 9D0000E4 00000000 nop 38: nv = strlen(phrase); 9D0000E8 8F848004 lw a0,-32764(gp) 9D0000EC 0F400082 jal 0x9d000208 9D0000F0 00000000 nop 9D0000F4 AFC20014 sw v0,20(s8) 39: printf("bins = %p\n",bins); 9D0000F8 3C029D07 lui v0,0x9d07 9D0000FC 244442DC addiu a0,v0,17116 9D000100 3C02A000 lui v0,0xa000 9D000104 2445023C addiu a1,v0,572 9D000108 0F400283 jal 0x9d000a0c 9D00010C 00000000 nop 40: do_hist(phrase,nv,bins); 9D000110 8F848004 lw a0,-32764(gp) 9D000114 8FC50014 lw a1,20(s8) 9D000118 3C02A000 lui v0,0xa000 9D00011C 2446023C addiu a2,v0,572 9D000120 0F4000E3 jal 0x9d00038c 9D000124 00000000 nop 41: show_bins(bins); 9D000128 3C02A000 lui v0,0xa000 9D00012C 2444023C addiu a0,v0,572 9D000130 0F400099 jal 0x9d000264 9D000134 00000000 nop 42: printf("v = %p\n",v); 9D000138 3C029D07 lui v0,0x9d07 9D00013C 244442E8 addiu a0,v0,17128 9D000140 3C02A000 lui v0,0xa000 9D000144 24450010 addiu a1,v0,16 9D000148 0F400283 jal 0x9d000a0c 9D00014C 00000000 nop 43: nv = sizeof(v) / sizeof(v[0]); 9D000150 24020004 addiu v0,zero,4 9D000154 AFC20014 sw v0,20(s8) 44: printf("v length %d\n",nv); 9D000158 3C029D07 lui v0,0x9d07 9D00015C 244442F0 addiu a0,v0,17136 9D000160 8FC50014 lw a1,20(s8) 9D000164 0F400283 jal 0x9d000a0c 9D000168 00000000 nop 45: cum_sum(v,nv); 9D00016C 3C02A000 lui v0,0xa000 9D000170 24440010 addiu a0,v0,16 9D000174 8FC50014 lw a1,20(s8) 9D000178 0F40012F jal 0x9d0004bc 9D00017C 00000000 nop 46: for (i=0; i<nv; i++) { 9D000180 AFC00010 sw zero,16(s8) 9D000184 8FC20010 lw v0,16(s8) 9D000188 8FC30014 lw v1,20(s8) 9D00018C 0043102A slt v0,v0,v1 9D000190 10400011 beq v0,zero,0x9d0001d8 9D000194 00000000 nop 9D0001C4 8FC20010 lw v0,16(s8) 9D0001C8 24420001 addiu v0,v0,1 9D0001CC AFC20010 sw v0,16(s8) 9D0001D0 1000FFEC beq zero,zero,0x9d000184 9D0001D4 00000000 nop 47: printf("%g\n",v[i]); 9D000198 3C04A000 lui a0,0xa000 9D00019C 8FC20010 lw v0,16(s8) 9D0001A0 000218C0 sll v1,v0,0x3 9D0001A4 24820010 addiu v0,a0,16 9D0001A8 00621821 addu v1,v1,v0 9D0001AC 3C029D07 lui v0,0x9d07 9D0001B0 24444300 addiu a0,v0,17152 9D0001B4 8C660000 lw a2,0(v1) 9D0001B8 8C670004 lw a3,4(v1) 9D0001BC 0F400283 jal 0x9d000a0c 9D0001C0 00000000 nop 48: } 49: DBPUTS("Program terminated. Click HALT and then RESET to stop the microcontroller. \n"); 9D0001D8 3C029D07 lui v0,0x9d07 9D0001DC 24444304 addiu a0,v0,17156 9D0001E0 2405004C addiu a1,zero,76 9D0001E4 0F400162 jal 0x9d000588 9D0001E8 00000000 nop 50: return 0; 9D0001EC 00001021 addu v0,zero,zero 51: } 9D0001F0 03C0E821 addu sp,s8,zero 9D0001F4 8FBF0024 lw ra,36(sp) 9D0001F8 8FBE0020 lw s8,32(sp) 9D0001FC 27BD0028 addiu sp,sp,40 9D000200 03E00008 jr ra 9D000204 00000000 nop 52: 53: int strlen(char *str) 54: { 9D000208 27BDFFF0 addiu sp,sp,-16 9D00020C AFBE0008 sw s8,8(sp) 9D000210 03A0F021 addu s8,sp,zero 9D000214 AFC40010 sw a0,16(s8) 55: int count = 0; 9D000218 AFC00000 sw zero,0(s8) 56: while (*str++) count++; 9D00021C 8FC20010 lw v0,16(s8) 9D000220 90430000 lbu v1,0(v0) 9D000224 24420001 addiu v0,v0,1 9D000228 AFC20010 sw v0,16(s8) 9D00022C 306200FF andi v0,v1,0xff 9D000230 10400006 beq v0,zero,0x9d00024c 9D000234 00000000 nop 9D000238 8FC20000 lw v0,0(s8) 9D00023C 24420001 addiu v0,v0,1 9D000240 AFC20000 sw v0,0(s8) 9D000244 1000FFF5 beq zero,zero,0x9d00021c 9D000248 00000000 nop 57: return count; 9D00024C 8FC20000 lw v0,0(s8) 58: } 9D000250 03C0E821 addu sp,s8,zero 9D000254 8FBE0008 lw s8,8(sp) 9D000258 27BD0010 addiu sp,sp,16 9D00025C 03E00008 jr ra 9D000260 00000000 nop 59: 60: void show_bins(short bins[96]) 61: { 9D000264 27BDFF90 addiu sp,sp,-112 9D000268 AFBF006C sw ra,108(sp) 9D00026C AFBE0068 sw s8,104(sp) 9D000270 03A0F021 addu s8,sp,zero 9D000274 AFC40070 sw a0,112(s8) 62: int i, n; 63: unsigned char ch; 64: unsigned char str[60]; 65: unsigned char *cp; 66: cp = str; 9D000278 27C20020 addiu v0,s8,32 9D00027C AFC20060 sw v0,96(s8) 67: for (i=1; i<60; i++) { 9D000280 24020001 addiu v0,zero,1 9D000284 AFC20010 sw v0,16(s8) 9D000288 8FC20010 lw v0,16(s8) 9D00028C 2842003C slti v0,v0,60 9D000290 10400028 beq v0,zero,0x9d000334 9D000294 00000000 nop 9D000320 8FC20010 lw v0,16(s8) 9D000324 24420001 addiu v0,v0,1 9D000328 AFC20010 sw v0,16(s8) 9D00032C 1000FFD6 beq zero,zero,0x9d000288 9D000330 00000000 nop 68: *cp = 0; 9D000298 8FC20060 lw v0,96(s8) 9D00029C A0400000 sb zero,0(v0) 69: ch = i+32; 9D0002A0 8FC20010 lw v0,16(s8) 9D0002A4 24420020 addiu v0,v0,32 9D0002A8 A3C20018 sb v0,24(s8) 70: n = bins[i]; 9D0002AC 8FC20010 lw v0,16(s8) 9D0002B0 00021840 sll v1,v0,0x1 9D0002B4 8FC20070 lw v0,112(s8) 9D0002B8 00621021 addu v0,v1,v0 9D0002BC 84420000 lh v0,0(v0) 9D0002C0 AFC20014 sw v0,20(s8) 71: if (n==0) continue; 9D0002C4 8FC20014 lw v0,20(s8) 9D0002C8 14400003 bne v0,zero,0x9d0002d8 9D0002CC 00000000 nop 9D0002D0 10000013 beq zero,zero,0x9d000320 9D0002D4 00000000 nop 72: *cp++ = ch; 9D0002D8 27C50060 addiu a1,s8,96 9D0002DC 8CA20000 lw v0,0(a1) 9D0002E0 00402021 addu a0,v0,zero 9D0002E4 93C30018 lbu v1,24(s8) 9D0002E8 A0830000 sb v1,0(a0) 9D0002EC 24420001 addiu v0,v0,1 9D0002F0 ACA20000 sw v0,0(a1) 73: printf("%c %4d\n",ch,bins[i]); 9D0002F4 93C50018 lbu a1,24(s8) 9D0002F8 8FC20010 lw v0,16(s8) 9D0002FC 00021840 sll v1,v0,0x1 9D000300 8FC20070 lw v0,112(s8) 9D000304 00621021 addu v0,v1,v0 9D000308 84430000 lh v1,0(v0) 9D00030C 3C029D07 lui v0,0x9d07 9D000310 24444354 addiu a0,v0,17236 9D000314 00603021 addu a2,v1,zero 9D000318 0F400283 jal 0x9d000a0c 9D00031C 00000000 nop 74: } 75: printf("characters present:\n%s\n",str); 9D000334 27C30020 addiu v1,s8,32 9D000338 3C029D07 lui v0,0x9d07 9D00033C 2444435C addiu a0,v0,17244 9D000340 00602821 addu a1,v1,zero 9D000344 0F400283 jal 0x9d000a0c 9D000348 00000000 nop 76: n = strlen(str); 9D00034C 27C20020 addiu v0,s8,32 9D000350 00402021 addu a0,v0,zero 9D000354 0F400082 jal 0x9d000208 9D000358 00000000 nop 9D00035C AFC20014 sw v0,20(s8) 77: printf("number of characters: %d\n",n); 9D000360 3C029D07 lui v0,0x9d07 9D000364 24444374 addiu a0,v0,17268 9D000368 8FC50014 lw a1,20(s8) 9D00036C 0F400283 jal 0x9d000a0c 9D000370 00000000 nop 78: } 9D000374 03C0E821 addu sp,s8,zero 9D000378 8FBF006C lw ra,108(sp) 9D00037C 8FBE0068 lw s8,104(sp) 9D000380 27BD0070 addiu sp,sp,112 9D000384 03E00008 jr ra 9D000388 00000000 nop 79: 80: void do_hist(char *str, int len, short bins[96]) 81: { 9D00038C 27BDFFF0 addiu sp,sp,-16 9D000390 AFBE0008 sw s8,8(sp) 9D000394 03A0F021 addu s8,sp,zero 9D000398 AFC40010 sw a0,16(s8) 9D00039C AFC50014 sw a1,20(s8) 9D0003A0 AFC60018 sw a2,24(s8) 82: int i, n; 83: for (i=0; i<96; i++) bins[i] = 0; 9D0003A4 AFC00000 sw zero,0(s8) 9D0003A8 8FC20000 lw v0,0(s8) 9D0003AC 28420060 slti v0,v0,96 9D0003B0 1040000B beq v0,zero,0x9d0003e0 9D0003B4 00000000 nop 9D0003B8 8FC20000 lw v0,0(s8) 9D0003BC 00021840 sll v1,v0,0x1 9D0003C0 8FC20018 lw v0,24(s8) 9D0003C4 00621021 addu v0,v1,v0 9D0003C8 A4400000 sh zero,0(v0) 9D0003CC 8FC20000 lw v0,0(s8) 9D0003D0 24420001 addiu v0,v0,1 9D0003D4 AFC20000 sw v0,0(s8) 9D0003D8 1000FFF3 beq zero,zero,0x9d0003a8 9D0003DC 00000000 nop 84: for (i=0; i<len; i++) { 9D0003E0 AFC00000 sw zero,0(s8) 9D0003E4 8FC20000 lw v0,0(s8) 9D0003E8 8FC30014 lw v1,20(s8) 9D0003EC 0043102A slt v0,v0,v1 9D0003F0 1040002D beq v0,zero,0x9d0004a8 9D0003F4 00000000 nop 9D000494 8FC20000 lw v0,0(s8) 9D000498 24420001 addiu v0,v0,1 9D00049C AFC20000 sw v0,0(s8) 9D0004A0 1000FFD0 beq zero,zero,0x9d0003e4 9D0004A4 00000000 nop 85: n = str[i]&0x7F; 9D0003F8 8FC30000 lw v1,0(s8) 9D0003FC 8FC20010 lw v0,16(s8) 9D000400 00621021 addu v0,v1,v0 9D000404 90420000 lbu v0,0(v0) 9D000408 3042007F andi v0,v0,0x7f 9D00040C AFC20004 sw v0,4(s8) 86: if (n==0) break; 9D000410 8FC20004 lw v0,4(s8) 9D000414 14400003 bne v0,zero,0x9d000424 9D000418 00000000 nop 9D00041C 10000022 beq zero,zero,0x9d0004a8 9D000420 00000000 nop 87: if (n>96) n -= 32; 9D000424 8FC20004 lw v0,4(s8) 9D000428 28420061 slti v0,v0,97 9D00042C 14400004 bne v0,zero,0x9d000440 9D000430 00000000 nop 9D000434 8FC20004 lw v0,4(s8) 9D000438 2442FFE0 addiu v0,v0,-32 9D00043C AFC20004 sw v0,4(s8) 88: if (n>32) n -= 32; 9D000440 8FC20004 lw v0,4(s8) 9D000444 28420021 slti v0,v0,33 9D000448 14400006 bne v0,zero,0x9d000464 9D00044C 00000000 nop 9D000450 8FC20004 lw v0,4(s8) 9D000454 2442FFE0 addiu v0,v0,-32 9D000458 AFC20004 sw v0,4(s8) 9D00045C 10000002 beq zero,zero,0x9d000468 9D000460 00000000 nop 89: else n = 0; 9D000464 AFC00004 sw zero,4(s8) 90: bins[n]++; 9D000468 8FC20004 lw v0,4(s8) 9D00046C 00021840 sll v1,v0,0x1 9D000470 8FC20018 lw v0,24(s8) 9D000474 00622021 addu a0,v1,v0 9D000478 8FC20004 lw v0,4(s8) 9D00047C 00021840 sll v1,v0,0x1 9D000480 8FC20018 lw v0,24(s8) 9D000484 00621021 addu v0,v1,v0 9D000488 94420000 lhu v0,0(v0) 9D00048C 24420001 addiu v0,v0,1 9D000490 A4820000 sh v0,0(a0) 91: } 92: } 9D0004A8 03C0E821 addu sp,s8,zero 9D0004AC 8FBE0008 lw s8,8(sp) 9D0004B0 27BD0010 addiu sp,sp,16 9D0004B4 03E00008 jr ra 9D0004B8 00000000 nop 93: 94: double cum_sum(double v[], int len) 95: { 9D0004BC 27BDFFD8 addiu sp,sp,-40 9D0004C0 AFBF0024 sw ra,36(sp) 9D0004C4 AFBE0020 sw s8,32(sp) 9D0004C8 03A0F021 addu s8,sp,zero 9D0004CC AFC40028 sw a0,40(s8) 9D0004D0 AFC5002C sw a1,44(s8) 96: int i; 97: double sum = v[0]; 9D0004D4 8FC20028 lw v0,40(s8) 9D0004D8 8C430004 lw v1,4(v0) 9D0004DC 8C420000 lw v0,0(v0) 9D0004E0 AFC20018 sw v0,24(s8) 9D0004E4 AFC3001C sw v1,28(s8) 98: for (i=1; i<len; i++) { 9D0004E8 24020001 addiu v0,zero,1 9D0004EC AFC20010 sw v0,16(s8) 9D0004F0 8FC20010 lw v0,16(s8) 9D0004F4 8FC3002C lw v1,44(s8) 9D0004F8 0043102A slt v0,v0,v1 9D0004FC 1040001A beq v0,zero,0x9d000568 9D000500 00000000 nop 9D000554 8FC20010 lw v0,16(s8) 9D000558 24420001 addiu v0,v0,1 9D00055C AFC20010 sw v0,16(s8) 9D000560 1000FFE3 beq zero,zero,0x9d0004f0 9D000564 00000000 nop 99: sum += v[i]; 9D000504 8FC20010 lw v0,16(s8) 9D000508 000218C0 sll v1,v0,0x3 9D00050C 8FC20028 lw v0,40(s8) 9D000510 00621021 addu v0,v1,v0 9D000514 8FC40018 lw a0,24(s8) 9D000518 8FC5001C lw a1,28(s8) 9D00051C 8C460000 lw a2,0(v0) 9D000520 8C470004 lw a3,4(v0) 9D000524 0F400B9C jal 0x9d002e70 9D000528 00000000 nop 9D00052C AFC20018 sw v0,24(s8) 9D000530 AFC3001C sw v1,28(s8) 100: v[i] = sum; 9D000534 8FC20010 lw v0,16(s8) 9D000538 000218C0 sll v1,v0,0x3 9D00053C 8FC20028 lw v0,40(s8) 9D000540 00622021 addu a0,v1,v0 9D000544 8FC20018 lw v0,24(s8) 9D000548 8FC3001C lw v1,28(s8) 9D00054C AC820000 sw v0,0(a0) 9D000550 AC830004 sw v1,4(a0) 101: } 102: return sum; 9D000568 8FC20018 lw v0,24(s8) 9D00056C 8FC3001C lw v1,28(s8) 103: } 9D000570 03C0E821 addu sp,s8,zero 9D000574 8FBF0024 lw ra,36(sp) 9D000578 8FBE0020 lw s8,32(sp) 9D00057C 27BD0028 addiu sp,sp,40 9D000580 03E00008 jr ra 9D000584 00000000 nop
Maintained by John Loomis, updated Sat Aug 23 22:17:03 2008