JTAG

JTAG (Joint Test Action Group) is the commonly-used name for IEEE std 1149.1, which defines a method for testing board-level interconnect - also called Boundary Scan.

The JTAG standard was developed to provide a simple way of testing circuit boards for bad connections - shorted pins, open pins, bad traces, etc. More recently, programmable-logic vendors have made use of JTAG as a convenient way of configuring devices.

JTAG compliant devices have dedicated hardware that comprises a state machine and several registers. This dedicated hardware interprets instructions and data provided by four dedicated signals. These signals are defined by the JTAG standard to be: TDI (Test Data In), TDO (Test Data Out), TMS (Test Mode Select), and TCK (Test ClocK). The dedicated JTAG hardware interprets instructions and data on the TDI and TMS signals, and drives data out on the TDO signal. The TCK signal is used to clock the process.


Maintained by John Loomis, last updated 6 Dec 2001