Design tools for integrated circuits

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To bring a system-on-a-chip design from visualization throughshipment of data for silicon fabrication requires many steps,processes, and iterations--each with its specialized tool.

High-level specification of the design and partitioning offunctions between hardware and software are followed by behavioraldesign and synthesis to assess the design's viability.

RTL synthesis transforms the design from hardware descriptionlanguage code to a list of gates and their interconnections.

Placement and routing tools position the gates on the chip andconnect them. The design must then be verified for correct timing,logical function, and physical ground rules before being shipped tothe fab.


IEEE Spectrum April 1999 Volume 36 Number 4(c) Copyright 1999,
The Institute of Electrical and Electronics Engineers, Inc.