Microelectronics Assignment 5

Your report should be either a Microsoft Word document or a powerpoint presentation. All other computer files associated with the assignment (SPICE, spreadsheets, etc.) should be referenced in the main document.

See class list for parts 4 and 5

1. Use SPICE to model the 5-stage transmission line models from Fig 4.46 (p 214) of the textbook. The goal is to reproduce the plot in Fig 4.46(c).

2. Use SPICE to find the linear dependence of the halfway-point rise and fall delays vs load capacitance for your inverter. You should include a plot of the data points you generated, a schematic of the circuit used to generate the data, and the equations of the fitted lines for high-to-low and low-to-high transitions.

3. Substitute another inverter for the load capacitance in the previous problem, calculate (using SPICE) the rise and fall times for the first inverter, and use the results of the previous problem to determine the input capacitance of the second inverter. Compare the result to the combined gate capacitance of the two transistors in the inverter.

4. Measure the rise/fall propagation delay time as for a (nand/nor) gate driving your standard inverter. Adjust the width of the transistors so that the rise and fall gate delays are equal to each other and to the inverter propagation delay. The standard inverter should be loaded by a capacitor equal to that determined in the previous problem.

5. Create a symbol for a (transmission gate/XOR/2-input mux/tristate inverter) and a transisitor schematic implementing the design. Demonstrate the operation of your device by creating a separate test circuit that instantiates the symbol you have created.

Maintained by John Loomis, last updated 17 October 2006