ECE 449 Assignment 5

Reference: RiSC-16 computer

1. Complete the multi-stage processor (in Verilog) that implements all RiSC-16 instructions. It should run the test program described in the prog2 webapge.

2. Write a behavioral simulator in C for a pipelined RiSC-16 computer. See the following material from Prof Jacob:

   RiSC-pipe.pdf
   p3a.pdf and p3a.zip

Maintained by John Loomis, last updated 6 April 2010