Figure 1. MAX232 (RS-232) chip schematic.
The DE2 board uses the MAX232 transceiver chip and a 9-pin D-SUB connector for RS-232 communications. For detailed information on how to use the transceiver refer to the datasheet. Figure 1 shows the related schematics, and Table 1 lists the Cyclone II FPGA pin assignments.
Figure 1. MAX232 (RS-232) chip schematic.
Table 1. RS-232 UART signal assignments
| Signal Name | Description |
|---|---|
| UART_RXD | UART Receiver |
| UART_TXD | UART Transmitter |
See DE2_pin_assignments.csv, a comma-delimited file that matches "standard" descriptive names to actual FPGA pin locations. This file can be directly opened in Microsoft Excel.
 | MAX232 Dual EIA-232 Driver/Receiver, datasheet |
DE2 User Manual, version 1.4, 2006. (pdf)
Maintained by John Loomis, last updated 18 April 2007